This repository showcases the projects I developed for the DE10-Lite board as part of the "FPGA Capstone: Building FPGA Projects" course on Coursera.
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Updated
Sep 26, 2024 - Verilog
This repository showcases the projects I developed for the DE10-Lite board as part of the "FPGA Capstone: Building FPGA Projects" course on Coursera.
Rescuing Moore’s Law via Room-Temperature Soliton Integration in Standard Silicon.
Build a Gardner Logic-Bridge IP core for threshold-programmable, room-temperature soliton logic in standard silicon
A formally verified, C programmable, custom ISA 160LUT softcore.
RISC-V Monociclo Softcore (Tang Nano 1K and 9K)
The lightweight RISCV core.
PandaBuilder by Logic Solutions Bründler
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