A Flyweight MBIST Block - FPGA synthesizable, Multi-algorithm integrated
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Jan 27, 2019 - Verilog
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Here are 9 public repositories matching this topic...
Open-source MBIST, BIRA and BISR generator for OpenRAM memories, taken through RTL-to-GDS on sky130 with LibreLane
dft eda sram fault-injection open-source-hardware jtag verilator bist mbist bira open-source-eda openram sky130 march-c bisr design-for-test memory-testing librelane march-test memory-bist
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Nov 4, 2026 - Python
March C− RTL MBIST with automated fault coverage evaluation, Artix-7 FPGA validation, and Nangate45 ASIC synthesis and timing analysis.
asic fpga rtl verilog systemverilog yosys static-timing-analysis design-verification openroad artix-7 mbist march-algorithm fault-coverage
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Oct 2, 2026 - Python
Post-manufacturing test analysis
compression decompression testing-tools fault-injection atpg bist jtag-boundary-scan mbist testability-analysis scan-chain fault-collapsing design-for-test
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Mar 27, 2024 - VHDL
Tiny SoC for learning the DFT flow with Tessent Shell 2022.4: Memory BIST, IJTAG and OCC insertion. Planned to be taken through synthesis, scan/ATPG and P&R to GDSII.
design-pattern dft rtl verilog vlsi design-for-testability occ verilog-project vlsi-design vlsi-designing mbist rtl-design tessent ijtag design-for-test vlsi-testing rtl-to-gdsii design-for-testability--dft
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Nov 2, 2026 - Tcl
32x8 SRAM with an MBIST controller running MATS+ and March C- against six runtime-injected fault models - including a coupling fault that MATS+ misses and March C- catches.
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Aug 26, 2026 - SystemVerilog
Silicon validation & characterization platform using LightGBM and RANSAC to model VDD vs. Frequency Shmoo plots, identify defect modes, optimize operating guardbands, and generate automated executive PDF reports.
python flask machine-learning data-visualization lightgbm ransac vlsi semiconductor mbist local-llm phi-3 atgp shmoo-plot
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Sep 21, 2026 - Python
SystemVerilog/Python research prototype for reliability-aware runtime DFT scheduling in robotic SoCs, with fault injection and automated verification.
python dft robotics reliability-engineering embedded-systems systemverilog fault-injection soc vlsi design-for-testability atpg hardware-verification mbist rtl-design design-for-test rtl-verification
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Oct 27, 2026 - SystemVerilog
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