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VaradaGovind/README.md

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  1. Prolepsis-SoC Prolepsis-SoC Public

    Prolepsis: An ISA-agnostic, RTL-based predictive Thermal Management Unit (TMU) for multicore processors, featuring Kalman-filter temperature forecasting.

    SystemVerilog 1

  2. hardware-debug-failure-learning hardware-debug-failure-learning Public

    Research prototype for safe reuse of RTL root-cause analysis across repeated hardware failures.

    Python

  3. MobileNet-Accelerator-RTL MobileNet-Accelerator-RTL Public

    🏆 Top 100 submission for the DVCon India 2026 Design Contest. A highly optimized, Verilog-based MobileNet Accelerator featuring a custom Systolic Array and on-the-fly Global Average Pooling.

    Verilog

  4. kairos-edge kairos-edge Public

    Hardware-software co-designed framework for thermally aware and memory-efficient edge inference.

    Python

  5. AES128-LowPower-Architecture AES128-LowPower-Architecture Public template

    Forked from tr0san/AES128bit

    Low-power AES-128 hardware architecture in Verilog, achieving a 50% reduction in dynamic power through parallel duplication and architecture-driven voltage scaling.

    Verilog

  6. algorithmic-fairness-analysis algorithmic-fairness-analysis Public

    Quantifying and mitigating educational bias in gig economy routing algorithms using causal models and constrained optimization.

    Python