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北邮数字逻辑课程设计之电子钟

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buptcourse-designdigital-logic

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Name		Name	Last commit message	Last commit date
bass.vhd		bass.vhd
clk_ring.vhd		clk_ring.vhd
clock.vhd		clock.vhd
counter_24.vhd		counter_24.vhd
counter_60.vhd		counter_60.vhd
display.vhd		display.vhd
divider.vhd		divider.vhd
encode24.vhd		encode24.vhd
ring.vhd		ring.vhd
treble.vhd		treble.vhd
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About

北邮数字逻辑课程设计之电子钟

Topics

buptcourse-designdigital-logic

Activity

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7 stars

Watchers

1 watching

Forks

2 forks

Report repository

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