BSc in Electrical Engineering with a strong focus on Microarchitecture, RTL Design, and the RISC-V ecosystem. Currently exploring structural hazards and performance optimization in the CVA6 core, aiming for a Master's degree in Computer Engineering.
- Computer Architecture: Deep understanding of processor microarchitecture (Single-cycle & Pipelined designs).
- RTL Design & Debugging: Designing and debugging hardware at the signal/waveform level.
- RISC-V Ecosystem: Working with toolchains, simulating the CVA6 core, and structural hazard analysis.
- Hardware Verification: Using standard tools for testing and verifying RTL designs.
Hardware Description & Verification:
Programming:
Simulation & EDA Tools:
